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pelgrom m analog digital conversion 4ed 2021

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Textbook in PDF format Preface to the Fourth Edition Preface to the Third Edition Preface to the Second Edition Preface to the First Edition Acknowledgments About the Author List of Symbols Reference Tables and Figures Introduction References Mathematics Algebra and Trigonometry Derivatives and Integrals Taylor series Fourier Transform Fourier Series Linearity and Distortion Laplace Transform z-Transform Statistics Basic Statistical Operations Poisson and Gauss Distributions Practical Estimation Correlation Functions of Statistical Variables Exercises References Electrical Theory Resistivity Power and Temperature Voltage and Temperature Coefficient Measuring Resistance Electromigration Thermal Noise /f Noise Shot Noise Maxwell Equations Inductors Energy in a Coil Straight-Wire Inductance Skin Effect and Eddy Current Transformer Capacitors Energy in a Capacitor Coaxial Cable Network Theory Kirchhoff's Laws, Thevenin, Norton, and Superposition Energy and Power Digital Power Consumption and Partial Charging Two-Port Networks Feedback Bode Plot Time Constant and Bandwidth Filters RLC Filters Sallen–Key and gm-C Filters Gyrator Exercises References Semiconductors Semiconductor Materials Bandgap and Boltzmann Semiconductor Resistivity Mott–Gurney Law Temperature and Voltage Coefficients Matching of Resistors PN-Junction Current in a Diode Temperature Behavior Linearization of Diodes Diode-Based Circuits Bipolar Junction Transistor Concentrations in a Bipolar Transistor Bipolar Circuits Darlington Pair MOS Capacitor Gate Capacitance Capacitors Between Layers Voltage and Temperature Coefficient Matching of Capacitors The MOS Transistor Different Operating Regimes MOS Transistor Current Threshold Voltage Weak-Inversion Current Large Signal and Small Signal Drain Voltage Modulation Output Impedance Matching of MOS Transistors High-Frequency Behavior Leakage Temperature Coefficient Noise in MOS Transistors Noise Cancellation Latch-up Enhancement and Depletion Transistors Advanced Device Architectures MOS Models Exercises References Electronic Circuits Basic Circuits Classification of Amplifiers One-Transistor Amplifier Inverter and Latch Source Follower Differential Pair Differential Difference Pair Degeneration Mixers and Variable Gain Amplifiers Current Mirror Cascode Variants Gain Boosting Operational Amplifiers Single-Stage Amplifier Folded Cascode Amplifier Miller Operational Amplifier Choosing the W/L Ratios in a Miller Opamp Dominant Pole Amplifier Feedback in Electronic Circuits Biasing Circuits Opamps and OTAs Switched-Capacitor Circuits Differential Design Oscillators LC Oscillators Quartz Oscillators RC Oscillators Phase-Locked Loop Oscillators: Phase Noise Jitter Exercises References Accuracy: Deterministic and Random Errors Design by Ratio Variability Deterministic Electrical Offsets Equal Dimensions Offset Caused by Electrical Differences Capacitors Resistors Linear Gradient Temperature Gradients Technology and Accuracy Lithography Proximity Effects Implantation Effects Offset Caused by Stress Issues with Wiring Offset Mitigation Random Matching Random Fluctuations in Devices Poisson and Gauss MOS Threshold Mismatch Current Factor Mismatch Current Mismatch in Strong and Weak Inversion Mismatch for Various Processes Application to Other Components Advanced Device Architectures Modeling Remarks Design Consequences Analog Design Digital Design Drift Limits of Power and Accuracy Exercises References Sampling Sampling in Time and Frequency Dirac Sequence Sampling Signals Sampling Limit: Nyquist Criterion Sampling Aspects Down-Sampling Subsampling and Decimation Alias Filter Alias Removal After Digital-to-AnalogConversion Getting Around Nyquist? Fourier Uncertainty Modulation and Chopping Modulation Chopping Reconstruction of Sampled Data Noise Sampled Noise Differential Noise Jitter Jitter of the Sampling Pulse Driving a Sampling Pulse Optical Sampling Time-Discrete Filtering Finite Impulse Response Filters Half-Band Filters IIR Filters Exercises References Sample-and-Hold Circuits Track-and-Hold and Sample-and-Hold Circuits Artifacts in T&H Circuits Pedestal Step Droop Hold-Mode Feed-Through Capacitor and Switch Implementations Capacitor Switch Impedance Complementary Switch High Voltages Bootstrap Techniques Threshold Modulation Bottom-Plate Sampling T&H Circuit Topologies Driving a T&H Configuration Buffering the Hold Capacitor Switched-Capacitor T&H Circuits Flip-Around T&H Circuit Offset and Noise in Flip-Around Circuits Differential Flip-Around Architecture MDAC: Amplifying T&H Circuit T&H with a Level-Shifting Opamp Correlated Double Sampling Bipolar T&H Circuit Distortion and Noise Exercises References Quantization Resolution Quantization Error -Bit Quantization - Bit Quantization -Bit and Higher Quantization Signal-to-Quantization Error Ratio SNQR Definition Related Definitions Nyquist Rate and Oversampled Architectures Linearity Integral Non-Linearity (INL) Differential Non-Linearity (DNL) Modeling INL and DNL From INL to Distortion DNL and Quantization Non-uniform Quantization Dither Figure-of-Merit Figure-of-Merit: Schreier Figure-of-Merit: Walden Figure-of-Merit: Digital-to-Analog Converters Figure-of-Merit: Risks Exercises References Reference Circuits General Requirements Bandgap Voltage Reference Circuits Principle Bipolar Devices in CMOS Standard CMOS Bandgap Circuit Artifacts: Start-Up Artifacts: Bandwidth Artifacts: Mismatch and Noise Bandgap Reference Circuits Bandgap Circuits in Bipolar Technology Current-Mode Bandgap Circuit Low-Voltage Bandgap Circuits Second Order Compensation Alternative References Weak Inversion DTMOST Reference Circuit Other Technological Options Exercises References Digital-to-Analog Conversion Representations Digital Codes Unary Representation Unary: INL and DNL Binary Representation Binary: INL and DNL Segmentation Segmented: INL and DNL Voltage-Domain Digital-to-Analog Conversion Resistor Ladders Resistor Ladder: Dynamic Behavior Practical Issues in Resistor Ladders Accuracy in Resistors Ladders R-R Ladders Accuracy in R-R Ladders A Video Resistor Ladder Digital-to-AnalogConverter Current-Domain Digital-to-Analog Conversion Buffered Current-Domain Digital-to-Analog Converters Current-Steering Digital-to-Analog Conversion Matrix Decoding INL and DNL Current Cell Switching the Current Cells Calibration of Current Sources Sorting and Selecting Performance Limits Semi-Digital Filters Charge-Domain Digital-to-Analog Conversion Switched-Capacitor Digital-to-Analog Conversion Charge-Redistribution Converters RF Digital-to-Analog Converters Bridge Capacitor Algorithmic Digital-to-Analog Conversion Conversion by Passive Redistribution Diophantine Digital-to-Analog Conversion Time-Domain Digital-to-Analog Conversion -Bit Digital-to-Analog Converter Time-Domain Signals Jitter in the Time Domain Class-D Amplifiers Exercises References Comparators Comparator Classification Limiting Amplifier Hysteresis Comparator Resistive Pre-amplification Integrating Pre-amplification Floating Inverter Regenerative Comparator Latch Comparator Issues Metastability and Bit Error Rate Accuracy Kick-Back Hysteresis Comparator Examples Comparators: Amplifier Based StrongARM Comparators Double-Tail Comparator Calibrated Comparators T&H Plus Comparator Exercises References Flash Analog-to-Digital Conversion Classification of Analog-to-Digital Converters Traditional Flash Converters Ladder Implementation Comparator Random Mismatch Comparator Yield Loss Decoder Advanced Schemes Averaging Interpolation Frequency Dependent Mismatch Time Interpolation Folding Converter Mismatch Dominated Converter Technology Scaling for Flash Converters Digital Output Power Power, Bandwidth, and Resolution Exercises References Subranging and Two-Step Analog-to-Digital Conversion Subranging Architecture Overrange Monkey-Switching Two-Step Architecture Overrange in Two-Step Architectures Exercises References Pipeline Analog-to-Digital Conversion -Bit Pipeline Converters Multiplying Digital-to-Analog Converter (MDAC) MDAC Implementation Error Sources in Pipeline Converters Multiply-by-Two Errors Bandwidth and Settling Noise Reduced Radix Converters with Calibration -Bit Pipeline Analog-to-Digital Converter Redundancy Design of an MDAC Stage Multi-Bit MDAC Stage Pipeline Variations Opamp Sharing Sample-and-Hold-Less Conversion Decoupled Capacitors Continuous-Time Front-End Other Forms of MDAC Amplification Algorithmic Converters Power, Bandwidth, and Resolution Exercises References Successive Approximation Conversion The Algorithm Charge-Redistribution Conversion Basic Operation Parasitic Capacitor Top-Plate or Bottom-Plate Input Bridge Capacitor Digital Controller Artifacts and Mitigations Speed, Noise, and Kick-Back Accuracy and Calibration Redundancy for Comparator Errors Sub-Radix- Base Energy Alternative Successive Approximation Converters Two-Step Architectures with SAR Passive Charge Division Multi-Bit Comparison Noise-Shaping SAR Mismatch-Error Shaping Resistive Successive Approximation Converter Power, Bandwidth, and Resolution Exercises References Linear and Time-Based Conversion Linear Approximation Converters Counting Converter Tracking Converter Time-Related Conversion Wilkinson Converter Dual-Slope Converter Pulse-Width Modulation Converter Voltage-to-Time Conversion Voltage-to-Frequency Conversion Time-to-Digital Conversion Vernier/Nonius Principle Other Conversion Proposals Level-Crossing Analog-to-Digital Conversion Asynchronous Successive ApproximationConversion Floating-Point Converter References Time-Interleaving The Need for Time Interleaving Time-Domain Interleaving Frequency-Domain View Input Sampling Buffer Input Driver Signal Distribution Track-and-Hold Implementations Time-Interleaving Errors Random DC-Offsets Between Channels Random Gain Differences Between Channels Input Sampling Errors Bandwidth Differences Reconstruction Errors Time-Interleaving Architectures Interleaving , Interleaving Interleaving Two-Stage Interleaving Frequency Multiplexing Power, Bandwidth, and Resolution Exercises References Time-Discrete Modulation Oversampling Oversampling in Analog-to-Digital Conversion Oversampling in Digital-to-Analog Conversion Noise Shaping Higher Order Noise Shaping Modulation A Quantizer in a Feedback Loop Linearization Time-Discrete Modulation First Order Modulator Second Order Modulator Cascade of Integrators Input Feed-Forward Modulator Circuit Design Considerations Overload Decimation Higher Order Time-Discrete Converters Cascaded Modulator -L MASH Digital-to-Analog Conversion Single-Loop Conversion Cascaded Digital-to-Analog Conversion Exercises References Time-Continuous Modulation First and Second Order Modulator Linearized Model Higher Order Converters Digital-to-Analog Converter in the Loop Excess Loop Delay in Time-Continuous Conversion Meta-Stability Latency Filter Implementations Time-Discrete and Time-Continuous Conversion Multi-Bit Conversion Various Forms of Modulation First Order Modulator with Choppingand Dither Complex Modulation Asynchronous Modulation Bandpass Converter Loop with Noise-Shaping Incremental Converter Power, Bandwidth, and Resolution Exercises References Mitigation of Errors Strategies Removing the Error Auto-Zero Mechanism Calibration Split Converters Moving the Error Dithering Chopping Dynamic Element Matching (DEM) Data-Weighted Averaging (DWA) Exercises References Characterization and Measurement Test Hardware Measurement Methods INL and DNL Harmonic Behavior and Coherent Testing Windowing Special Measurements Noise Bit Error Rate Multi-Tone Power Ratio Differential Gain and Differential Phase Self-Testing How to Solve a Problem? Exercises References Index

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Pelgrom M. Analog-To-Digital Conversion 4ed 2021.pdf 35.6 MB

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pelgrom m analog digital conversion 4ed 2021