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dillinger t vlsi design methodology development 2019

Type:: E-books
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Size:: 39.6 MB
Uploaded On:: Jan. 16, 2022, 3:04 p.m.
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Info Hash:: E6CC3B44B866D172B897A137B04D765C5138ECDB

Textbook in PDF format As microelectronics engineers design complex chips using existing circuit libraries, they must ensure correct logical, physical, and electrical properties, and prepare for reliable foundry fabrication. This book focuses on the design and analysis steps needed to perform these tasks and successfully complete a modern chip design. Microprocessor design authority Tom Dillinger carefully introduces core concepts, and then guides engineers through modeling, functional design validation, design implementation, electrical analysis, and release to manufacturing. Writing from the engineer’s perspective, he covers underlying EDA tool algorithms, flows, criteria for assessing project status, and key tradeoffs and interdependencies. This fresh and accessible tutorial will be valuable to all VLSI system designers, senior undergraduate or graduate students of microelectronics design, and companies offering internal courses for engineers at all levels. This guide is for all VLSI system designers, senior undergraduate or graduate students of microelectronics design, and companies offering internal courses for engineers at all levels. It is applicable to engineering teams undertaking new projects and migrating existing designs to new technologies. Preface. Overview of VLSI Design Methodology. Introduction. VLSI Design Methodology. Hierarchical Design Decomposition. Modeling. Cell and IP Modeling. Design Validation. Characteristics of Functional Validation. Characteristics of Formal Equivalency Verification. Design Implementation. Logic Synthesis. Placement. Routing. Electrical Analysis. Layout Parasitic Extraction and Electrical Modeling. Timing Analysis. Noise Analysis. Power Analysis. Power Rail Voltage Drop Analysis. Electromigration (EM) Reliability Analysis. Miscellaneous Electrical Analysis Requirements. Preparation for Manufacturing Release and Bring-Up. ECOs. Physical Design Verification. Design for Testability Analysis. Preparation for Tapeout. Post-Silicon Debug and Characterization (“Bring-up”) and Product Qualification. Index

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Dillinger T. VLSI Design Methodology Development 2019.pdf 39.6 MB

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dillinger t vlsi design methodology development 2019