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veenstra h circuit interconnect design rf app 2008

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Textbook in PDF format Circuit and interconnect design techniques that tackle many of the greatest difficulties and uncertainties in the development of ICs for RF and high bit-rate applications are the subject of this book. At bit-rates above 10 Gb/s, the impact of on-chip interconnect on circuit performance can be detrimental to the performance of the IC. The bottlenecks in interconnect design, circuit design and on-chip signal distribution for high bit-rate applications are analysed, and solutions for circumventing them presented. These methodologies can be applied to analyse whether target bit-rates and frequencies can be reached in a given IC technology, or to provide guidelines for further IC process optimisation in support of today’s and tomorrow’s high bit-rate circuit design. It should be noted that specific amplifier requirements such as low noise and intermodulation distortion are not discussed in this book. Preface The Challenge Interconnect Modelling, Analysis and Design Device Metrics Cross-Connect Switch Design Bias Circuits Tolerating Output Voltages Above BVCEO Design of Synchronous High-Speed CML Circuits, a PRBS Generator Analysis and Design of High-Frequency LC-VCOs Glossary Appendix A Index

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Veenstra H. Circuit and Interconnect Design for RF...App 2008.pdf 7.5 MB

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veenstra h circuit interconnect design rf app 2008